Student Work
Development of an Hardware Accelerator
Type:
Bachelor or Master Thesis
Summary:
The objective of this project is to develop an hardware accellerator to solve a mathematical optimization problem. For the problem presented in [1] there exists a customized solver, based on C++/MPI, which can be executed on large computing clusters. The algorithm is based on an branch an bound algorithm. In each node some simple calculations have to be performed, which could also be accellerated on an FPGA.
Supervisors:
Links:
Development of Software for ADALM Pluto SDR
Type:
Bachelor or Master Thesis
Summary:
The objective of this project is to develop a Software-Defined Radio (SDR) application for controlling the ADALM Pluto FPGA SDR plattform [2], manufactured by Analog Devices. The software will provide functionalities for both signal reception (RX) and transmission (TX). Moreover, it will include a waterfall diagram and spectrum view, along with the capability to demodulate and modulate Single Sideband (SSB) signals [3]. Additionally, the software will support the connection to the Pluto via ethernet and audio input and output via the computer's sound card. The implementation will be based on the Qt framework, with [1] serving as the initial reference. The primary purpose of this SDR application is to establish communication with the geostationary satellite QO-100.
Supervisors:
Prof. Matthias Jung and Prof. Guido Dietl
Links:
Construction of a QO-100 Ground Station
Type:
Bachelor or Master Thesis
Summary:
The goal of this project is to design and construct a QO-100 Ground Station. The station will consist of a 2.4 GHz Helix Antenna, which can be fabricated using 3D printing techniques, and an standard LNB. For transmission (TX) amplification, the student can either utilize the amplifiers mentioned in references [1,2] or attempt to build a custom amplifier. To receive (RX) and generate the RF signals, the ADALM Pluto SDR [3] will be employed, and it can be controlled through the SDRConsole Software [4]. To ensure the stability of the Pluto SDR FPGA system's clock, a GPS Disciplined Oscillator (GPS-DO) will be implemented. For instance, reference [5] provides a suitable option, but the student may also consider developing a custom GPS-DO and PCB.
Supervisors:
Prof. Matthias Jung and Prof. Guido Dietl
Links:
- https://www.sg-lab.com/AMP2400v3/amp2400_v3.html
- https://www.sg-lab.com/PREAMP2400/amp2400_v1.html
- https://www.analog.com/en/design-center/evaluation-hardware-and-software/evaluation-boards-kits/adalm-pluto.html
- https://www.leobodnar.com/shop/index.php?main_page=product_info&cPath=107&products_id=301
