Best Paper Award for the Computer Engineering group at the HiPEAC RAPIDO Workshop
01/23/2025The Computer Engineering group was honored with the Best Paper Award at the HiPEAC RAPIDO workshop for their cutting-edge power simulator, DRAMPower 5.
Power consumption in DRAM is a critical issue in today’s computing systems, making it essential to obtain early power estimates during the design space exploration phase of new systems.
The presented simulator offers these estimates and is continuously being developed as part of the BMBF project DI-DE:RAMSys, in collaboration with partners Fraunhofer IESE and Rheinland-Pfälzische Technische Universität Kaiserslautern-Landau (RPTU).
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